dc.contributor.author | Senarathne, W.A.D.P.B. | |
dc.contributor.author | Wijesinghe, W.A.S. | |
dc.date.accessioned | 2020-07-22T05:48:06Z | |
dc.date.available | 2020-07-22T05:48:06Z | |
dc.date.issued | 2016 | |
dc.identifier.citation | Proceedings of Annual Symposium on Research and Industrial Training of Department of Electronics, 24th March, 2016:p.91-96 | |
dc.identifier.uri | http://repository.wyb.ac.lk/handle/1/1481 | |
dc.publisher | Faculty of Applied Sciences, Wayamba University of Sri Lanka, Kuliyapitiya | |
dc.subject | Proceedings | |
dc.subject | FPGA | |
dc.subject | RISC architecture | |
dc.subject | ALU | |
dc.subject | CPU | |
dc.subject | Xilinx | |
dc.subject | Verilog | |
dc.title | Implementation 16-bit microprocessor with RISC architecture on an FPGA using verilog | |
dc.type | Conference Paper |