dc.contributor.author | Premadasa, G.M.L. | |
dc.contributor.author | Wijesinghe, W.A.S. | |
dc.date.accessioned | 2020-07-22T05:48:53Z | |
dc.date.available | 2020-07-22T05:48:53Z | |
dc.date.issued | 2016 | |
dc.identifier.citation | Proceedings of Annual Symposium on Research and Industrial Training of Department of Electronics, 24th March, 2016:p.25-30 | |
dc.identifier.uri | http://repository.wyb.ac.lk/handle/1/1628 | |
dc.publisher | Faculty of Applied Sciences, Wayamba University of Sri Lanka, Kuliyapitiya | |
dc.subject | Proceedings | |
dc.subject | DDR SDRAM controller | |
dc.subject | FPGA | |
dc.subject | Verilog | |
dc.title | DDR memory controllier for Spartan 3E FPGA | |
dc.type | Conference Paper |